Texas Tech University

Cadence

Cadence® University Program Member

License active until: March 31, 2017
Page last updated: March 8, 2017

Overview

Welcome to the home page of the Cadence Users Group at Texas Tech University. This page contains information about the Cadence design tools extensively used in classes and research programs in the Department of Electrical and Computer Engineering at Texas Tech. Students obtain practical experience in advanced electronics design using state-of-the-art CAD tools, computing and laboratory facilities, and access to the MOSIS foundry for prototyping of integrated circuits.

General Cadence Tutorials

Students, please DO NOT print the manuals. Try to use the online manuals as far as possible.

RF System-on-Chip Laboratory

RF System-on-Chip Laboratory Website

Classes

A basic introduction to very large-scale integrated (VLSI) design of circuits and devices. Geometrical patterns of semiconductor devices on a chip, MOS circuits, masking and patterning, and automation tools.

Principles involved in designing analog integrated circuits. Device physics, small signal, and large signal models. Biasing and basic circuit building blocks. Applications.

Analysis and design techniques for modern communication circuits.

Development, implementation, and application of advanced circuit models for the design of integrated circuits. Designed to enhance design skills through direct application of computer-aided analysis tools.

Discrete microwave circuits: Review of transmission-line and waveguide theory, scattering matrix, impedance matching, resonators, passive three- and four-port devices, filters, active circuits

Special topics graduate courses series (I): Introduction: the history of radio, Impedance Matching Methods, Q, 50 ohm question; Noise Analysis: noise types, noise figure, noise temperature; Linearity Analysis: intermodulation, harmonic distortion, gain compression, dynamic range; Frequency Conversion: theory, diodes and mixers, spurious response; Receiver/Transmitter Architectures: direct-conversion, heterodyne, image-reject receivers; RF Device Modeling: Active devices (BJT, MOS, RF device & noise models); RF Device Modeling: passives (R, L, C); varactors (MOS, P-N); inductors; SoC Block Level Spec requirement and examples

Special topics graduate courses series (II): Introduction: general discussion on SoC receiver block level: LNA, mixers, VCOs, PAs, etc., from block level design spec and consideration; RF Device Modeling: Active devices (BJT, MOS; device & noise models); RF Device Modeling: passives (R, L, C); varactors (MOS, P-N); inductors; Receiver/Transmitter Architectures: direct-conversion, heterodyne, image-reject receivers, LNA IC Design: BJT LNAs; MOS LNAs; theory & design; Mixer IC Design: BJT mixers; MOS mixer; theory & design; Bias Circuit IC Design: PTAT/CTAT; theory & design; VCO design; PLL and PA design

For more info please see the University Catalog.

Product Statement

"Information is provided "as is" without warranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise.

Any attempt to use this information is at your own risk---we recommend using it on a copy of your data to be sure you understand what it does and under what conditions. Keep your master intact until you are personally satisfied with the use of this information within your environment."

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